1. Field of the Invention
The present invention is directed to technology for reading memory devices.
2. Description of the Related Art
Semiconductor memory devices have become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
Both EEPROM and flash memory utilize a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage of the transistors is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate.
Many EEPROMs and flash memories have a floating gate that is used to store two ranges of charges and, therefore, the memory cell can be programmed/erased between two states. Such memory cells store one bit of data. Other EEPROMs and flash memory cells store multiple ranges of charge and, therefore, such memory cells can be programmed to multiple states. Such memory cells store multiple bits of data. The size and parameters of the threshold voltage window depends on the device characteristics, operating conditions and history.
Conventional EEPROMs and flash memories can experience endurance related stress each time the device goes through an erase and program cycle. The endurance of a flash memory is its ability to withstand a given number of program and erase cycles. With use, defects tend to build up in the memory device and may eventually render the device unreliable. One physical phenomenon limiting the endurance of prior flash memory devices is the trapping of electrons in the active dielectric between the floating gate and the substrate. During programming, electrons are injected from the substrate to the floating gate through the dielectric. Similarly, during erasing, electrons are extracted from the floating gate through the dielectric. In both cases, electrons can be trapped by the dielectric. The trapped electrons oppose the applied electric field and subsequent program/erase cycles, thereby causing the programmed threshold voltage to shift to a lower value and the erased threshold voltage to shift to a higher value. This can be seen in a gradual closure of the voltage window between the programmed and erased states. If program/erase cycling is continued, the device may eventually experience catastrophic failure. This problem is even more critical if multi-state memory is implemented, since more accurate placement of the threshold voltage is demanded.
A second problem pertains to charge retention on the floating gate. For example, negative charge on the floating gate tends to diminish somewhat through leakage over a period of time. This causes the threshold voltage to shift to a lower value over time. Over the lifetime of the device, the threshold voltage may shift as much as one volt or more. In a multi-state device, this could shift the memory cell by one or two states.
A third problem is that the program/erase cycles may not be performed evenly for the cells in the memory device. For example, it is not uncommon that a repetitive pattern may be programmed continuously into a set of memory cells. Therefore, some cells will constantly be programmed and erased while other cells will never or rarely be programmed. Such uneven programming and erasing causes non-uniform stress conditions for the cells in a particular sector. Non-uniformity of the program/erase cycling histories can result in a wider distribution of threshold voltages for any particular given state. In addition to widening the threshold distributions, certain cells may reach closure of the voltage window, device failure or charge retention issues earlier than others.